Hesam Zolfaghari
- 2019
- Published
An Explicitly Parallel Architecture for Packet Processing in Software Defined Networks
Zolfaghari, H., Rossi, D. & Nurmi, J., 29 Oct 2019, 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). Nurmi, J., Ellervee, P., Halonen, K. & Röning, J. (eds.). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Reducing crossbar costs in the match-action pipeline
Zolfaghari, H., Rossi, D. & Nurmi, J., 1 May 2019, 2019 IEEE 20th International Conference on High Performance Switching and Routing, HPSR 2019. IEEE, (IEEE International Conference on High Performance Switching and Routing, HPSR).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- E-pub ahead of print
A custom processor for protocol-independent packet parsing
Zolfaghari, H., Rossi, D. & Nurmi, J., 2019, In : Microprocessors and Microsystems. 72, 11 p.Research output: Contribution to journal › Article › Scientific › peer-review
- 2018
- Published
Low-latency Packet Parsing in Software Defined Networks
Zolfaghari, H., Rossi, D. & Nurmi, J., 13 Dec 2018, 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
An Explicitly Parallel Architecture for Packet Parsing in Software Defined Networks
Zolfaghari, H., Rossi, D. & Nurmi, J., 23 Aug 2018, 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). IEEE, 4 p. ( IEEE International Conference on Application-Specific Systems, Architectures, and Processors).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
ID: 9653099