Tampere University of Technology

TUTCRIS Research Portal

Jani Boutellier

  1. 2017
  2. Published

    Evaluation of real-time LBP computing in multiple architectures

    Bordallo López, M., Nieto, A., Boutellier, J., Hannuksela, J. & Silvén, O., Jun 2017, In : Journal of Real-Time Image Processing. 13, 2

    Research output: Contribution to journalArticleScientificpeer-review

  3. Published

    Evolutionary multiobjective optimization for adaptive dataflow-based digital predistortion architectures

    Li, L., Ghazi, A., Boutellier, J., Anttila, L., Valkama, M. & Bhattacharyya, S. S., 23 Feb 2017, In : EAI Endorsed Transactions on Cognitive Communications. 17, 10, e3.

    Research output: Contribution to journalArticleScientificpeer-review

  4. Published

    Design Flow for GPU and Multicore Execution of Dynamic Dataflow Programs

    Boutellier, J. & Nyländen, T., 2017, In : Journal of Signal Processing Systems. 89, 3, p. 469–478 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  5. Published

    Parallel Digital Predistortion Design on Mobile GPU and Embedded Multicore CPU for Mobile Transmitters

    Li, K., Ghazi, A., Tarver, C., Boutellier, J., Abdelaziz, M., Anttila, L., Juntti, M., Valkama, M. & Cavallaro, J. R., 2017, In : Journal of Signal Processing Systems. 89, 3, p. 417–430 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  6. 2016
  7. Published

    Design space exploration and constrained multiobjective optimization for digital predistortion systems

    Li, L., Ghazi, A., Boutellier, J., Anttila, L., Valkama, M. & Bhattacharyya, S. S., 1 Dec 2016, 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP). p. 182-185 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. 2015
  9. Published

    BM3D image denoising using heterogeneous computing platforms

    Sarjanoja, S., Boutellier, J. & Hannuksela, J., 28 Dec 2015, DASIP 2015 - Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing. IEEE COMPUTER SOCIETY PRESS, Vol. 2015-December. 7367257

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Published

    Reconfigurable computing for future vision-capable devices

    López, M. B., Nieto, A., Silvén, O., Bóutellier, J. & Vilariño, D. L., 22 Dec 2015, Proceedings - 2015 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2015. Institute of Electrical and Electronics Engineers Inc., p. 34-41 8 p. 7363657

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Published

    Programming graphics processing units in the RVC-CAL dataflow language

    Boutellier, J. & Nyländen, T., 2 Dec 2015, Electronic Proceedings of the 2015 IEEE International Workshop on Signal Processing Systems, SiPS 2015. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-December. 7344994

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Published

    Executing dataflow actors as kahn processes

    Tretter, A., Boutellier, J., Guthrie, J., Schor, L. & Thiele, L., 4 Nov 2015, 2015 Proceedings of the International Conference on Embedded Software, EMSOFT 2015. Institute of Electrical and Electronics Engineers Inc., p. 105-114 10 p. 7318265

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Published

    Programmable Low-Power Multicore Coprocessor Architecture for HEVC/H.265 In-Loop Filtering

    Hautala, I., Boutellier, J., Hannuksela, J. & Silvén, O., 1 Jul 2015, In : IEEE Transactions on Circuits and Systems for Video Technology. 25, 7, p. 1217-1230 14 p., 6954471.

    Research output: Contribution to journalArticleScientificpeer-review

ID: 7000001