Tampere University of Technology

TUTCRIS Research Portal

Jani Boutellier

  1. 2019
  2. Published

    Comparing Optimization Methods of Neural Networks for Real-time Inference

    Khan, M., Lunnikivi, H., Huttunen, H. & Boutellier, J., 3 Sep 2019, 2019 27th European Signal Processing Conference (EUSIPCO). IEEE, 5 p. (European Signal Processing Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  3. Published

    Extending Architecture Modeling for Signal Processing towards GPUs

    Payvar, S., Boutellier, J., Morvan, A., Rubattu, C. & Pelcat, M., Sep 2019, 2019 27th European Signal Processing Conference (EUSIPCO). IEEE, (European Signal Processing Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  4. E-pub ahead of print

    TTADF: Power Efficient Dataflow-Based Multicore Co-Design Flow

    Hautala, I., Boutellier, J. & Silvén, O., 27 Aug 2019, In : IEEE Transactions on Computers.

    Research output: Contribution to journalArticleScientificpeer-review

  5. Published

    The Direction Cosine Matrix Algorithm in Fixed-point: Implementation and Analysis

    Meirhaeghe, A., Boutellier, J. & Collin, J., 2019, ICASSP 2019 - 2019 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP). IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  6. 2018
  7. Published

    Embedded Implementation of a Deep Learning Smile Detector

    Ghazi, P., Happonen, A. P., Boutellier, J. & Huttunen, H., Nov 2018, 2018 7th European Workshop on Visual Information Processing (EUVIP): 26-28 November, 2018, Tampere, Finland. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  8. Published

    Toward Efficient Execution of RVC-CAL Dataflow Programs on Multicore Platforms

    Hautala, I., Boutellier, J., Nyländen, T. & Silvén, O., Nov 2018, In : Journal of Signal Processing Systems. 90, 11, p. 1507-1517 11 p.

    Research output: Contribution to journalArticleScientificpeer-review

  9. Published

    Design Flow for Portable Dataflow Programming of Heterogeneous Platforms

    Boutellier, J. & Lunnikivi, H., Oct 2018, 2018 Conference on Design and Architectures for Signal and Image Processing. IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Published

    Binarized Convolutional Neural Networks for Efficient Inference on GPUs

    Khan, M., Huttunen, H. & Boutellier, J., Sep 2018, 2018 26th European Signal Processing Conference (EUSIPCO). IEEE, p. 682-686

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Published

    PRUNE: Dynamic and Decidable Dataflow for Signal Processing on Heterogeneous Platforms

    Boutellier, J., Wu, J., Huttunen, H. & Bhattacharyya, S., 2018, In : IEEE Transactions on Signal Processing. 66, 3, p. 654-665

    Research output: Contribution to journalArticleScientificpeer-review

  12. 2017
  13. Published

    Low-power heterogeneous computing via adaptive execution of dataflow actors

    Boutellier, J. & Bhattacharyya, S. S., 16 Nov 2017, 2017 IEEE International Workshop on Signal Processing Systems (SiPS). IEEE

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Published

    Evaluation of real-time LBP computing in multiple architectures

    Bordallo López, M., Nieto, A., Boutellier, J., Hannuksela, J. & Silvén, O., Jun 2017, In : Journal of Real-Time Image Processing. 13, 2

    Research output: Contribution to journalArticleScientificpeer-review

  15. Published

    Evolutionary multiobjective optimization for adaptive dataflow-based digital predistortion architectures

    Li, L., Ghazi, A., Boutellier, J., Anttila, L., Valkama, M. & Bhattacharyya, S. S., 23 Feb 2017, In : EAI Endorsed Transactions on Cognitive Communications. 17, 10, e3.

    Research output: Contribution to journalArticleScientificpeer-review

  16. Published

    Design Flow for GPU and Multicore Execution of Dynamic Dataflow Programs

    Boutellier, J. & Nyländen, T., 2017, In : Journal of Signal Processing Systems. 89, 3, p. 469–478 10 p.

    Research output: Contribution to journalArticleScientificpeer-review

  17. Published

    Parallel Digital Predistortion Design on Mobile GPU and Embedded Multicore CPU for Mobile Transmitters

    Li, K., Ghazi, A., Tarver, C., Boutellier, J., Abdelaziz, M., Anttila, L., Juntti, M., Valkama, M. & Cavallaro, J. R., 2017, In : Journal of Signal Processing Systems. 89, 3, p. 417–430 14 p.

    Research output: Contribution to journalArticleScientificpeer-review

  18. 2016
  19. Published

    Design space exploration and constrained multiobjective optimization for digital predistortion systems

    Li, L., Ghazi, A., Boutellier, J., Anttila, L., Valkama, M. & Bhattacharyya, S. S., 1 Dec 2016, 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP). p. 182-185 4 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  20. 2015
  21. Published

    BM3D image denoising using heterogeneous computing platforms

    Sarjanoja, S., Boutellier, J. & Hannuksela, J., 28 Dec 2015, DASIP 2015 - Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing. IEEE COMPUTER SOCIETY PRESS, Vol. 2015-December. 7367257

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  22. Published

    Reconfigurable computing for future vision-capable devices

    López, M. B., Nieto, A., Silvén, O., Bóutellier, J. & Vilariño, D. L., 22 Dec 2015, Proceedings - 2015 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, SAMOS 2015. Institute of Electrical and Electronics Engineers Inc., p. 34-41 8 p. 7363657

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  23. Published

    Programming graphics processing units in the RVC-CAL dataflow language

    Boutellier, J. & Nyländen, T., 2 Dec 2015, Electronic Proceedings of the 2015 IEEE International Workshop on Signal Processing Systems, SiPS 2015. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-December. 7344994

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  24. Published

    Executing dataflow actors as kahn processes

    Tretter, A., Boutellier, J., Guthrie, J., Schor, L. & Thiele, L., 4 Nov 2015, 2015 Proceedings of the International Conference on Embedded Software, EMSOFT 2015. Institute of Electrical and Electronics Engineers Inc., p. 105-114 10 p. 7318265

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  25. Published

    Programmable Low-Power Multicore Coprocessor Architecture for HEVC/H.265 In-Loop Filtering

    Hautala, I., Boutellier, J., Hannuksela, J. & Silvén, O., 1 Jul 2015, In : IEEE Transactions on Circuits and Systems for Video Technology. 25, 7, p. 1217-1230 14 p., 6954471.

    Research output: Contribution to journalArticleScientificpeer-review

  26. Published

    Actor Merging for Dataflow Process Networks

    Boutellier, J., Ersfolk, J., Lilius, J., Mattavelli, M., Roquier, G. & Silvén, O., 15 May 2015, In : IEEE Transactions on Signal Processing. 63, 10, p. 2496-2508 13 p., 7055878.

    Research output: Contribution to journalArticleScientificpeer-review

  27. Published

    A methodology for profiling and partitioning stream programs on many-core architectures

    Michalska, M., Boutellier, J. & Mattavelli, M., 2015, Procedia Computer Science. Vol. 51. p. 2962-2966 5 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  28. 2014
  29. Published

    Low-Power Reconfigurable Miniature Sensor Nodes for Condition Monitoring

    Nyländen, T., Boutellier, J., Nikunen, K., Hannuksela, J. & Silvén, O., 2014, In : International Journal of Parallel Programming. 43, 1, p. 3-23 21 p.

    Research output: Contribution to journalArticleScientificpeer-review

  30. 2013
  31. Published

    Automated design of networks of transport-triggered architecture processors using dynamic dataflow programs

    Yviquel, H., Boutellier, J., Raulet, M. & Casseau, E., Nov 2013, In : Signal Processing: Image Communication. 28, 10, p. 1295-1302 8 p.

    Research output: Contribution to journalArticleScientificpeer-review

  32. Published

    Towards generic embedded multiprocessing for RVC-CAL dataflow programs

    Boutellier, J. & Silvén, O., Nov 2013, In : Journal of Signal Processing Systems. 73, 2, p. 137-142 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  33. Published

    Programmable lowpower implementation of the HEVC Adaptive Loop Filter

    Hautala, I., Boutellier, J. & Hannuksela, J., 18 Oct 2013, 2013 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2013 - Proceedings. p. 2664-2668 5 p. 6638139

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  34. Published

    Applying the adaptive hybrid flow-Shop scheduling method to schedule a 3GPP LTE physical layer algorithm onto many-core digital signal processors

    Heulot, J., Boutellier, J., Pelcat, M., Nezan, J. F. & Aridhi, S., 2013, Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2013. p. 123-129 7 p. 6604235

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  35. Published

    Automatic hierarchical discovery of quasi-static schedules of RVC-CAL dataflow programs

    Boutellier, J., Raulet, M. & Silvén, O., 2013, In : Journal of Signal Processing Systems. 71, 1, p. 35-40 6 p.

    Research output: Contribution to journalArticleScientificpeer-review

  36. Published

    Design space exploration and implementation of RVC-CAL applications using the TURNUS framework

    Casale-Brunet, S., Bezati, E., Alberti, C., Roquier, G., Mattavelli, M., Janneck, J. W. & Boutellier, J., 2013, DASIP 2013 - Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing. p. 341-342 2 p. 6661566

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  37. Published

    High-performance programs by source-level merging of RVC-CAL dataflow actors

    Boutellier, J., Ghazi, A., Silvén, O. & Ersfolk, J., 2013, 2013 IEEE Workshop on Signal Processing Systems, SiPS 2013. Institute of Electrical and Electronics Engineers Inc., p. 360-365 6 p. 6674533

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  38. Published

    Programmable implementation of zero-crossing demodulator on an application specific processor

    Ghazi, A., Boutellier, J., Hannuksela, J., Shahabuddin, S. & Silvén, O., 2013, 2013 IEEE Workshop on Signal Processing Systems, SiPS 2013. Institute of Electrical and Electronics Engineers Inc., p. 231-236 6 p. 6674510

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  39. 2012
  40. Published

    Application-specific instruction processor for extracting local binary patterns

    Boutellier, J., Lundbom, I., Janhunen, J., Ylimainen, J. & Hannuksela, J., 2012, DASIP 2012 - Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing. p. 82-89 8 p. 6385363

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  41. Published

    Reconfigurable miniature sensor nodes for condition monitoring

    Nylanden, T., Boutellier, J., Nikunen, K., Hannuksela, J. & Silven, O., 2012, Proceedings - 2012 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2012. p. 113-119 7 p. 6404164

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  42. 2011
  43. Published

    Quasi-static scheduling of CAL actor networks for reconfigurable video coding

    Boutellier, J., Lucarz, C., Lafond, S., Gomez, V. M. & Mattavelli, M., May 2011, In : Journal of Signal Processing Systems. 63, 2, p. 191-202 12 p.

    Research output: Contribution to journalArticleScientificpeer-review

  44. Published

    Automatic synthesis of TTA processor networks from RVC-CAL dataflow programs

    Boutellier, J., Silvén, O. & Raulet, M., 2011, 2011 IEEE Workshop on Signal Processing Systems, SiPS 2011, Proceedings. p. 25-30 6 p. 6088944

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  45. Published

    Multiprocessor scheduling of dataflow programs within the reconfigurable video coding framework

    Boutellier, J., Lucarz, C., Gomez, V. M., Mattavelli, M. & Silvén, O., 2011, Algorithm-Architecture Matching for Signal and Image Processing - Best Papers from Design and Architectures for Signal and Image Processing 2007 and 2008 and 2009. Vol. 73 LNEE. p. 237-251 15 p. (Lecture Notes in Electrical Engineering; vol. 73 LNEE).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  46. Published

    Scheduling of CAL actor networks based on dynamic code analysis

    Boutellier, J., Silven, O. & Raulet, M., 2011, 2011 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2011 - Proceedings. p. 1609-1612 4 p. 5946805

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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