Jarno Vanne
- Conference contribution › Scientific › Peer-reviewed
- Published
Dynamic Resource Allocation for HEVC Encoding in FPGA-Accelerated SDN Cloud
Sjövall, P., Oinonen, A., Teuho, M., Vanne, J. & Hämäläinen, T. D., Oct 2019, 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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End-to-End Real-Time ROI-Based Encryption in HEVC Videos
Abu Taha, M., Sidaty, N., Hamidouche, W., Déforges, O., Vanne, J. & Viitanen, M., Sep 2018, 2018 European Signal Processing Conference (EUSIPCO). IEEE, p. 171-174Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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Enhanced Configurable Parallel Memory Architecture
Vanne, J., Aho, E., Kuusilinna, K. & Hämäläinen, T., 2002, Proceedings of DCD 2002 Euromicro Symposium on Digital System Design; Architectures, Methods and Tools, September 4-6, 2002, Dortmund, Germany. Edwards, M. (ed.). p. 28-35Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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Eye-Controlled Region of Interest HEVC Encoding
Sainio, J., Ylä-Outinen, A., Viitanen, M., Vanne, J. & Hämäläinen, T. D., Dec 2018, 2018 IEEE International Symposium on Multimedia (ISM). IEEE, 2 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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Fast and easy live video service setup using lightweight virtualization
Heikkinen, A., Pääkkönen, P., Viitanen, M., Vanne, J., Riikonen, T. & Bakanoglu, K., 12 Jun 2018, Proceedings of the 9th ACM Multimedia Systems Conference, MMSys 2018. ACM, p. 487-489 3 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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FPGA-Powered 4K120p HEVC Intra Encoder
Sjövall, P., Viitamäki, V., Vanne, J., Hämäläinen, T. & Kulmala, A., 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, p. 1-5Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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Hardware Deceleration of Kvazaar HEVC Encoder
Sainio, J., Mercat, A. & Vanne, J., 4 Oct 2019, Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Proceedings. Springer, p. 311-324 14 p. (Lecture Notes in Computer Science; vol. 11733).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA
Sjövall, P., Virtanen, J., Vanne, J. & Hämäläinen, T. D., 2015, 18th Euromicro Conference on Digital Systems Design (DSD 2015). IEEE, p. 49 - 56 8 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA
Sjövall, P., Viitamäki, V., Vanne, J. & Hämäläinen, T. D., 2017, Proceedings of 2017 IEEE International Conference on Acoustics, Speech and Signal Processing. IEEE, p. 1547-1551Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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High-level synthesized 2-D IDCT/IDST implementation for HEVC codecs on FPGA
Viitamäki, V., Sjövall, P., Vanne, J. & Hämäläinen, T. D., 2017, Proceedings of 2017 IEEE International Symposium on Circuits and Systems. IEEE, p. 1-4Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
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ID: 66514
