Jarno Vanne
- Article › Scientific › Peer-reviewed
- Published
A configurable motion estimation architecture for block-matching algorithms
Vanne, J., Aho, E., Kuusilinna, K. & Hämäläinen, T. D., 2009, In : IEEE Transactions on Circuits and Systems for Video Technology. 19, 4, p. 466-476Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Address computation in configurable parallel memory architecture
Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T. D., 2004, In : IEICE Transactions on Information and Systems. E87-D, 7, p. 1674-1681Research output: Contribution to journal › Article › Scientific › peer-review
- Published
A high-performance sum of absolute difference implementation for motion estimation
Vanne, J., Aho, E., Hämäläinen, T. D. & Kuusilinna, K., 2006, In : IEEE Transactions on Circuits and Systems for Video Technology. 16, 7, p. 876-883Research output: Contribution to journal › Article › Scientific › peer-review
- Published
A parallel memory system for variable block-size motion estimation algorithms
Vanne, J., Aho, E., Hämäläinen, T. D. & Kuusilinna, K., 2008, In : IEEE Transactions on Circuits and Systems for Video Technology. 18, 4, p. 538-543Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Are We There Yet? A Study on the State of High-level Synthesis
Lahti, S., Sjövall, P., Vanne, J. & Hämäläinen, T. D., May 2019, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38, 5, p. 898-911Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Block-level parallel processing for scaling evenly divisible images
Aho, E., Vanne, J., Hämäläinen, T. D. & Kuusilinna, K., 2005, In : IEEE Transactions on Circuits and Systems. Part 1: Regular Papers. 52, 12, p. 2717-2725Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Comments on "Winscale: An image-scaling algorithm using an area pixel model"
Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T. D., 2005, In : IEEE Transactions on Circuits and Systems for Video Technology. 15, 3, p. 454-455Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Comparative Rate-Distortion-Complexity Analysis of HEVC and AVC Video Codecs
Vanne, J., Viitanen, M., Hämäläinen, T. D. & Hallapuro, A., 2012, In : IEEE Transactions on Circuits and Systems for Video Technology. 22, 12, p. 1885-1898Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Configurable data memory for multimedia processing
Aho, E., Vanne, J. & Hämäläinen, T. D., 2008, In : Journal of Signal Processing Systems. 50, 2, p. 231-249Research output: Contribution to journal › Article › Scientific › peer-review
Configurable implementation of parallel memory based real-time video downscaler
Aho, E., Vanne, J., Hämäläinen, T. D. & Kuusilinna, K., 2007, In : Microprocessors and Microsystems. 31, 5, p. 283-292Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Efficient Mode Decision Schemes for HEVC Inter Prediction
Vanne, J., Viitanen, M. & Hämäläinen, T. D., 2014, In : IEEE Transactions on Circuits and Systems for Video Technology. 24, 9, p. 1579-1593 15 p.Research output: Contribution to journal › Article › Scientific › peer-review
- Published
Generic Software Framework for a Line-Buffer-Based Image Processing Pipeline
Määttä, J-M., Vanne, J., Hämäläinen, T. D. & Nikkanen, J., 2011, In : IEEE Transactions on Consumer Electronics. 57, 3, p. 1442-1449Research output: Contribution to journal › Article › Scientific › peer-review
- Chapter › Scientific › Peer-reviewed
- Published
Configurable Address Computation in a Parallel Memory Architecture
Aho, E., Vanne, J., Kuusilinna, K., Hämäläinen, T. & Saarinen, J., 2001, Advances in Signal Processing and Computer Technologies. Electrical and Computer Engineering Series. A Series of Reference Books and Textbooks.. Antoniou, G. (ed.). Kreikka: WSES Press, p. 390-395Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review
- Published
Configurable Parallel Memory Implementation For System-on-Chip Designs
Vanne, J., Aho, E., Kuusilinna, K. & Hämäläinen, T., 2003, System-on-Chip for Real-Time Applications. Badawy, W. & Jullien, G. A. (eds.). Kluwer Academic Publish ers, p. 237-248Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review
- Published
XOR-scheme Implementations In Configurable Parallel Memory
Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T., 2002, System-on-Chip for Real-Time Applications. Badawy, W. & Jullien, G. A. (eds.). Kluwer Academic Publish ers, p. 249-261 (The International Series in Engineering and Computer Science).Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review
- Conference contribution › Scientific › Not peer-reviewed
- Published
Configurable Address Computation in a Parallel Memory Architecture
Aho, E., Vanne, J., Kuusilinna, K., Hämäläinen, T. & Saarinen, J., 2001, Proceedings of the 5th WSES International Conference on Circuits, Systems, Communications and Computers (CSCC 2001), July 8-15, 2001, Rethymno, Greece. Mastorakis, N. (ed.). p. 4941-4946Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific
- Published
Configurable Paralell Memory Implementation For Systenm-on-Chip Designs
Vanne, J., Aho, E., Kuusilinna, K. & Hämäläinen, T., 2002, WSOC Proceedings of the International Workshop on System on Chip for Real-time Applications, July 5 - 7, 2002, Banff, Canada. p. 253-264Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific
- Published
Co-simulation of Configurable Parallel Memory Architecture and Processor
Vanne, J., Aho, E., Kuusilinna, K. & Hämäläinen, T., 2002, Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop, April 17-19, 2002, Brno, Czech Republic. Straube, B. (ed.). p. 310-313Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific
- Published
Diamond Scheme Implementations in Configurable Parallel Memory
Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T., 2002, Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems, April 17-19, 2002, Brno, Czech Republic. Straube, B. (ed.). p. 211-218Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific
- Published
Xor-scheme Implementations In Configurable Pararell Memory
Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T., 2002, WSOC Proceedings of the International Workshop on System on Chip for Real-time Applications, July 5 - 7, 2002, Banff, Canada. p. 287-298Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific
- Conference contribution › Scientific › Peer-reviewed
- Published
Acceleration of Kvazaar HEVC Intra Encoder With Machine Learning
Mercat, A., Lemmetti, A., Viitanen, M. & Vanne, J., 26 Aug 2019, 2019 IEEE International Conference on Image Processing (ICIP). IEEE, p. 2676-2680 5 p. (IEEE International Conference on Image Processing).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Access Format Implementations in Configurable Parallel Memory
Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T., 2002, Proceedings of ICIS 2002 the 2nd International Conference on Computer and Information Science, August 8-9, 2002, Seoul, Korea. Yang, H. S. (ed.). p. 59-64Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
AVX2-optimized Kvazaar HEVC intra encoder
Lemmetti, A., Koivula, A., Viitanen, M., Vanne, J. & Hämäläinen, T., 2016, 2016 IEEE International Conference on Image Processing (ICIP). IEEE, p. 549-553Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Block-level parallel processing for scaling evenly divisible frames
Aho, E., Vanne, J., Hämäläinen, T. D. & Kuusilinna, K., 2005, Proceedings of ISCAS 2005 IEEE International Symposium on Circuits and Systems, 23-26 May 2005, Kobe, Japan. p. 1134-1137Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Comparative Study of 8 and 10-bit HEVC Encoders
Vanne, J., Viitanen, M., Koivula, A. & Hämäläinen, T. D., 2014, Proceedings of the The IEEE Visual Communications and Image Processing Conference, IEEE VCIP, Valletta, Malta, December 7-10, 2014. IEEE, p. 542-545 4 p. (Visual communications and image processing).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Complexity Analysis of Next-Generation HEVC Decoder
Viitanen, M., Vanne, J., Hämäläinen, T. D., Gabbouj, M. & Lainema, J., 2012, ISCAS 2012, IEEE International Symposium on Circuits and Systems, May 20-23, 2012, Seoul, Korea. Piscataway, NJ: Institute of Electrical and Electronics Engineers IEEE, p. 882-885 (IEEE International Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Complexity Reduction Opportunities in the Future VVC Intra Encoder
Tissier, A., Mercat, A., Amestoy, T., Hamidouche, W., Vanne, J. & Menard, D., Sep 2019, 2019 IEEE 21st International Workshop on Multimedia Signal Processing (MMSP). IEEE, 6 p. (IEEE International Workshop on Multimedia Signal Processing).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Demo: CiThruS Traffic Scene Simulator
Niemirepo, T., Toivonen, J., Pitkanen, M., Viitanen, M. & Vanne, J., 2019, 2019 IEEE Vehicular Networking Conference (VNC). IEEE, 2 p. (IEEE Vehicular Networking Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Designing a clock cycle accurate application with high-level synthesis
Lahti, S., Vanne, J. & Hämäläinen, T. D., 2016, Industrial Electronics Society, IECON 2016 - 42nd Annual Conference of the IEEE. IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Distributed SystemC Simulation on Manycore Servers
Hämäläinen, T. D., Virtanen, J., Sjövall, P., Viitanen, M. & Vanne, J., 2016, Proceedings of 2016 Nordic Circuits and Systems Conference. 6 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Dynamic Resource Allocation for HEVC Encoding in FPGA-Accelerated SDN Cloud
Sjövall, P., Oinonen, A., Teuho, M., Vanne, J. & Hämäläinen, T. D., Oct 2019, 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
End-to-End Real-Time ROI-Based Encryption in HEVC Videos
Abu Taha, M., Sidaty, N., Hamidouche, W., Déforges, O., Vanne, J. & Viitanen, M., Sep 2018, 2018 European Signal Processing Conference (EUSIPCO). IEEE, p. 171-174Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Enhanced Configurable Parallel Memory Architecture
Vanne, J., Aho, E., Kuusilinna, K. & Hämäläinen, T., 2002, Proceedings of DCD 2002 Euromicro Symposium on Digital System Design; Architectures, Methods and Tools, September 4-6, 2002, Dortmund, Germany. Edwards, M. (ed.). p. 28-35Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Eye-Controlled Region of Interest HEVC Encoding
Sainio, J., Ylä-Outinen, A., Viitanen, M., Vanne, J. & Hämäläinen, T. D., Dec 2018, 2018 IEEE International Symposium on Multimedia (ISM). IEEE, 2 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Fast and easy live video service setup using lightweight virtualization
Heikkinen, A., Pääkkönen, P., Viitanen, M., Vanne, J., Riikonen, T. & Bakanoglu, K., 12 Jun 2018, Proceedings of the 9th ACM Multimedia Systems Conference, MMSys 2018. ACM, p. 487-489 3 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
FPGA-Powered 4K120p HEVC Intra Encoder
Sjövall, P., Viitamäki, V., Vanne, J., Hämäläinen, T. & Kulmala, A., 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS). IEEE, p. 1-5Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Hardware Deceleration of Kvazaar HEVC Encoder
Sainio, J., Mercat, A. & Vanne, J., 4 Oct 2019, Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Proceedings. Springer, p. 311-324 14 p. (Lecture Notes in Computer Science; vol. 11733).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA
Sjövall, P., Virtanen, J., Vanne, J. & Hämäläinen, T. D., 2015, 18th Euromicro Conference on Digital Systems Design (DSD 2015). IEEE, p. 49 - 56 8 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA
Sjövall, P., Viitamäki, V., Vanne, J. & Hämäläinen, T. D., 2017, Proceedings of 2017 IEEE International Conference on Acoustics, Speech and Signal Processing. IEEE, p. 1547-1551Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
High-level synthesized 2-D IDCT/IDST implementation for HEVC codecs on FPGA
Viitamäki, V., Sjövall, P., Vanne, J. & Hämäläinen, T. D., 2017, Proceedings of 2017 IEEE International Symposium on Circuits and Systems. IEEE, p. 1-4Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazaar 2.0: Fast and efficient open-source HEVC inter encoder
Lemmetti, A., Viitanen, M., Mercat, A. & Vanne, J., 27 May 2020, MMSys 2020 - Proceedings of the 2020 Multimedia Systems Conference. ACM, p. 237-242 6 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazaar 4K HEVC Intra Encoder on FPGA Accelerated Airframe Server
Sjövall, P., Viitamäki, V., Vanne, J. & Hämäläinen, T., 2017, Proceedings of 2017 IEEE International Workshop on Signal Processing Systems. IEEE, p. 1-6Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazaar HEVC encoder for Efficient Intra Coding
Viitanen, M., Koivula, A., Lemmetti, A., Vanne, J. & Hämäläinen, T. D., 2015, Proceedings of the IEEE International Symposium on Circuits and Systems, IEEE ISCAS, Lisbon, Portugal, May 24-27, 2015. IEEE, p. 1662-1665 4 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazaar: HEVC/H.265 4K30p Intra Encoder
Ylä-Outinen, A., Lemmetti, A., Viitanen, M., Vanne, J. & Hämäläinen, T. D., Dec 2017, 2017 IEEE International Symposium on Multimedia (ISM). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazaar HEVC Still Image Coding on Raspberry Pi 2 for Low-cost Remote Surveillance
Viitanen, M., Koivula, A., Vanne, J. & Hämäläinen, T. D., 2015, Proceedings of the The IEEE Visual Communications and Image Processing Conference, IEEE VCIP, Singapore, December 13-16, 2015. IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazaar: Open-Source HEVC/H.265 Encoder
Viitanen, M., Koivula, A., Lemmetti, A., Ylä-Outinen, A., Vanne, J. & Hämäläinen, T. D., Oct 2016, Proceedings of the 2016 ACM on Multimedia Conference. ACM, p. 1179-1182Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Kvazzup: Open Software for HEVC Video Calls
Räsänen, J., Viitanen, M., Vanne, J. & Hämäläinen, T. D., Dec 2017, 2017 IEEE International Symposium on Multimedia (ISM). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Live Demonstration: 4K100p HEVC Intra Encoder
Viitamäki, V., Sjövall, P., Vanne, J., Hämäläinen, T. & Kulmala, A., 2018, Proceedings of 2018 IEEE International Symposium on Circuits and Systems. IEEE, p. 1-1Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Live demonstration: end-to-end real-time ROI-based encryption in HEVC videos
Sidaty, N., Viitanen, M., Hamidouche, W., Vanne, J. & Déforges, O., 2018, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018. IEEE, 1 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
- Published
Live Demonstration: Kvazzup 4K HEVC Video Call
Räsänen, J., Viitanen, M., Vanne, J. & Hämäläinen, T., 2018, 2018 IEEE International Symposium on Multimedia (ISM). IEEEResearch output: Chapter in Book/Report/Conference proceeding › Conference contribution › Scientific › peer-review
ID: 66514