Tampere University of Technology

TUTCRIS Research Portal

Jarno Vanne

  1. Doctoral thesis › Collection of Articles
  2. Published

    Design and Implementation of Configurable Motion Estimation Architecture for Video Encoding

    Vanne, J. J., 23 Sep 2011, Tampere University of Technology. 95 p. (Tampere University of Technology. Publication; vol. 982)

    Research output: Book/ReportDoctoral thesisCollection of Articles

  3. Commissioned report › Professional
  4. Published

    HM 4.0 entropy coding complexity considerations

    Viitanen, M., Vanne, J., Hämäläinen, T. D., Lainema, J. & Ugur, K., 2011, Geneva: ITU, ISO, IEC. 4 p. (Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T-SG16 WP3 and ISO/IEC JTC1/SC29/WG11, 7th Meeting Geneva, CH, 21-30 November, 2011)

    Research output: Book/ReportCommissioned reportProfessional

  5. Patent › Scientific
  6. Published

    Menetelmä ja rinnakkaismuistijärjestelmä liikkeenestimointialgoritmeille

    Vanne, J., Aho, E. & Hämäläinen, T. D., 2008, Patent No. Pat. FI 119167 B, Priority date 15 Aug 2008, Priority No. (21) FI 20060507

    Research output: PatentScientific

  7. Published

    Piiri ja menetelmä erojen itseisarvojen summan laskemiseksi nopeasti ja tehokkaasti. Krets och metod för att räkna en sum av absoluta skillnader snabbt och effektivt

    Vanne, J., Aho, E. & Hämäläinen, T. D., 2007, Patent No. Pat. FI 117956 B, Priority date 30 Apr 2007, Priority No. (21) 20050388

    Research output: PatentScientific

  8. Conference contribution › Scientific › Peer-reviewed
  9. Published

    Acceleration of Kvazaar HEVC Intra Encoder With Machine Learning

    Mercat, A., Lemmetti, A., Viitanen, M. & Vanne, J., 26 Aug 2019, 2019 IEEE International Conference on Image Processing (ICIP). IEEE, p. 2676-2680 5 p. (IEEE International Conference on Image Processing).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  10. Published

    Access Format Implementations in Configurable Parallel Memory

    Aho, E., Vanne, J., Kuusilinna, K. & Hämäläinen, T., 2002, Proceedings of ICIS 2002 the 2nd International Conference on Computer and Information Science, August 8-9, 2002, Seoul, Korea. Yang, H. S. (ed.). p. 59-64

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  11. Published

    AVX2-optimized Kvazaar HEVC intra encoder

    Lemmetti, A., Koivula, A., Viitanen, M., Vanne, J. & Hämäläinen, T., 2016, 2016 IEEE International Conference on Image Processing (ICIP). IEEE, p. 549-553

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  12. Published

    Block-level parallel processing for scaling evenly divisible frames

    Aho, E., Vanne, J., Hämäläinen, T. D. & Kuusilinna, K., 2005, Proceedings of ISCAS 2005 IEEE International Symposium on Circuits and Systems, 23-26 May 2005, Kobe, Japan. p. 1134-1137

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  13. Published

    Comparative Study of 8 and 10-bit HEVC Encoders

    Vanne, J., Viitanen, M., Koivula, A. & Hämäläinen, T. D., 2014, Proceedings of the The IEEE Visual Communications and Image Processing Conference, IEEE VCIP, Valletta, Malta, December 7-10, 2014. IEEE, p. 542-545 4 p. (Visual communications and image processing).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

  14. Published

    Complexity Analysis of Next-Generation HEVC Decoder

    Viitanen, M., Vanne, J., Hämäläinen, T. D., Gabbouj, M. & Lainema, J., 2012, ISCAS 2012, IEEE International Symposium on Circuits and Systems, May 20-23, 2012, Seoul, Korea. Piscataway, NJ: Institute of Electrical and Electronics Engineers IEEE, p. 882-885 (IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

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