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A 122Mb/s Turbo decoder using a mid-range GPU

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Details

Original languageEnglish
Title of host publication2013 9th International Wireless Communications and Mobile Computing Conference (IWCMC), 1-5 July 2013, Sardinia
PublisherInstitute of Electrical and Electronics Engineers IEEE
Pages1090 - 1094
Number of pages5
ISBN (Electronic)978-1-4673-2480-9
ISBN (Print)978-1-4673-2479-3
DOIs
Publication statusPublished - 2013
Publication typeA4 Article in a conference publication

Publication series

NameInternational Wireless Communications and Mobile Computing Conference

Abstract

Parallel implementations of Turbo decoding has been studied extensively. Traditionally, the number of parallel sub-decoders is limited to maintain acceptable code block error rate performance loss caused by the edge effect of code block division. In addition, the sub-decoders require synchronization to exchange information in the iterative process. In this paper, we propose loosening the synchronization between the sub-decoders to achieve higher utilization of parallel processor resources. Our method allows high degree of parallel processor utilization in decoding of a single code block providing a scalable software-based implementation. The proposed implementation is demonstrated using a graphics processing unit. We achieve 122.8Mbps decoding throughput using a medium range GPU, the Nvidia GTX480. This is, to the best of our knowledge, the fastest Turbo decoding throughput achieved with a GPU-based implementation.

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