Address computation in configurable parallel memory architecture
Research output: Contribution to journal › Article › Scientific › peer-review
Details
| Translated title of the contribution | Address computation in configurable parallel memory architecture |
|---|---|
| Original language | English |
| Pages (from-to) | 1674-1681 |
| Journal | IEICE Transactions on Information and Systems |
| Volume | E87-D |
| Issue number | 7 |
| Publication status | Published - 2004 |
| Publication type | A1 Journal article-refereed |