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Advanced Instruction Set Architectures for Reducing Program Memory Usage in a DSP Processor

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Details

Original languageEnglish
Title of host publicationProceedings of the International Workshop on Electronic Design, Test and Applications, January 29-31, 2002, Christchurch, New Zealand
EditorsM. Renovell
Pages477-479
Publication statusPublished - 2002
Publication typeA4 Article in a conference publication

Publication forum classification