Computationally efficient decimators, interpolators, and narrow transition-band linear-phase finite impulse response (FIR) filters
Research output: Book/Report › Doctoral thesis › Monograph
|Place of Publication||Tampere|
|Publisher||Tampere University of Technology|
|Number of pages||229|
|Publication status||Published - 23 Feb 2007|
|Publication type||G4 Doctoral dissertation (monograph)|
|Name||Tampere University of Technology. Publication|
|Publisher||Tampere University of Technology|
In many digital-filtering applications, it is crucial that the shape of the waveform to be filtered is preserved. This desirable property is owned by a class of digital filters, collectively referred to as linear-phase digital filters.
In very large scale integration (VLSI) applications, the designs requiring the smallest number of multipliers are of particular interest, since depending on the application, less multipliers is tantamount to a smaller or a less power consuming VLSI chip. To this end, there has been a constant effort to come up with designs requiring minimum possible number of multipliers to meet a predefined specification.
Two important classes of digital filters, decimators and interpolators, have been a focus of the above-mentioned effort. Decimators and interpolators are integral parts of a multirate digital signal processing (DSP) system, and because of vast applications of such systems, decimators and interpolators are found virtually in every DSP-utilizing scheme. It should therefore come as no surprise that a lot of designs have been directed to the design of these two important classes of digital filters.
Digital filters with narrow transition band form another important class of digital filters. As the transition band becomes narrower, the required number of multipliers for meeting the specifications increases, and with conventional methods, the required number of multipliers becomes extremely large and the design becomes impractical. That is why efficient implementation of narrow transition-band digital filters have been a focus of intense research.
This work introduces techniques for efficient design of a class of decimators, interpolators and narrow transition-band linear-phase finite impulse response (FIR) filters. Linear-phase one-stage decimators and interpolators are the focus of the first part of the work. The design of this class of digital filters has been addressed as an optimization problem, and an algorithm to solve the problem has been proposed. Next, multiple branch linear-phase decimators have been introduced, and the ideas of a multiple branch design and a one-stage design have been combined to give rise to a hybrid structure. An algorithm leading to an optimum such structure has been proposed, and further constraints have been imposed to yield a structure with the least possible number of multipliers.
The focus of the second part of this work is on the design of narrow transition-band linear-phase FIR filters. The efficiency of the design stems from the fact that infinite impulse response (IIR) filters have been exploited. In essence, the design is a cascade of a stable IIR and an unstable IIR filter. To overcome the adverse effects of roundoff noise, the principle of switching and resetting has been employed. To curb the noise further and to reduce the number of required components, two decomposition schemes has been proposed. The noise generated by the structure has been analyzed in detail, and closed form formulae to measure the noise have been put forward. Finally, the design of this class of filters is addressed as an optimization problem, and a method to find the initial point of the optimizing algorithm is proposed.
The third part of the thesis takes an alternative approach for the design of narrow transition-band linear-phase FIR filters. In this approach, partial fraction expansion is applied to the cascade of a stable IIR filter and its unstable counterpart, but now the transfer function is expressed in terms of z + zˉ¹. By factorizing the proposed structure and using the principle of switching and resetting, the filter implementation is discussed. The noise generated by the structure is analyzed in detail, and it is proved that the performance of the proposed structure is not impaired by the generated noise. The efficiency of all the proposed structure have been supported by numerical simulations. When compared with alternative methods, the results of the simulations clearly indicate the attractiveness and potentials of the proposed structures.