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Data flow algorithms for processors with vector extensions: Handling actors with internal state

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Details

Original languageEnglish
Title of host publication2014 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages20-24
Number of pages5
ISBN (Electronic)9781479970889
DOIs
Publication statusPublished - 5 Feb 2014
Publication typeA4 Article in a conference publication
Event2014 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2014 - Atlanta, United States
Duration: 3 Dec 20145 Dec 2014

Conference

Conference2014 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2014
CountryUnited States
CityAtlanta
Period3/12/145/12/14

Abstract

Full use of the parallel computation capabilities of present and expected CPUs and CPUs require use of vector extensions. Yet many actors in data flow systems for digital signal processing have internal state (or, equivalently, an edge that loops from the actor back to itself) that impose serial dependencies between actor invocations that make vectorizing across actor invocations impossible. Ideally, issues of inter-thread coordination required by serial data dependencies should be handled by code written by parallel programming experts that is separate from code specifying signal processing operations. The purpose of this paper is to present one approach for so doing in the case of actors that maintain state. We propose a methodology for using the parallel scan (also known as prefix sum) pattern to create algorithms for multiple simultaneous invocations of such an actor that results in vectorizable code. Two examples of applying this methodology are given: (1) infinite impulse response filters and (2) finite state machines. The correctness and performance of the resulting IIR filters are studied.

ASJC Scopus subject areas

Keywords

  • Data flow computing, Digital signal processing, Parallel algorithms, Vector processors