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Evaluation of Different Processor Architecture Organizations for On-Site Electronics in Harsh Environments

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Details

Original languageEnglish
Title of host publicationProceedings of SAMOS XIX: Embedded Computer Systems: Architectures, Modeling, and Simulation
PublisherSpringer
Pages3-17
ISBN (Print)9783030275617
DOIs
Publication statusPublished - Jul 2019
Publication typeA4 Article in a conference publication
EventInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation - Samos, Greece
Duration: 7 Jul 201911 Jul 2019

Publication series

NameLecture Notes in Computer Science
Volume11733
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

ConferenceInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation
CountryGreece
CitySamos
Period7/07/1911/07/19

Abstract

Microcontroller units used in harsh environmental conditions are manufactured using large semiconductor technology nodes in order to provide reliable operation, even at high temperatures or increased radiation exposition. These large technology nodes imply high gate propagation delays, drastically reducing the system’s performance. When reducing area costs and power consumption, the actual processor architecture becomes a major design point. Depending on the application characteristics (i.e., inherent data parallelisms, type of arithmetic,..), several parameters like data path width, instruction execution paradigm, or other architectural design mechanisms have to be considered. This paper presents a design space exploration of five different architectures implemented for a 0.18µm SOI CMOS technology for high temperature using an exemplary case study from the fields of communication, i.e., Reed-Solomon encoder. For this algorithm, an application-specific configuration of a transport-triggered architecture has 37.70x of the performance of a standard 8-bit microcontroller while the silicon area is increased by 4.10x.

Publication forum classification

Field of science, Statistics Finland