Tampere University of Technology

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Hierarchical integrated VLSI simulation environment - Device parameter optimization for circuit simulation

Research output: Book/ReportCommissioned reportProfessional

Details

Original languageEnglish
Place of PublicationTampere
PublisherTampere University of Technology
Number of pages40
Publication statusPublished - 1989
Publication typeD4 Published development or research report or study

Publication series

NameTUT/Electronics Laboratory, Report
PublisherTampere University of Technology
No.5

Publication forum classification