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Models of architecture: Reproducible efficiency evaluation for signal processing systems

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Details

Original languageEnglish
Title of host publicationIEEE International Workshop on Signal Processing Systems, SiPS 2016
PublisherIEEE
Pages121-126
Number of pages6
ISBN (Electronic)9781509033614
DOIs
Publication statusPublished - 9 Dec 2016
Publication typeA4 Article in a conference publication
EventIEEE International Workshop on Signal Processing Systems -
Duration: 1 Jan 1900 → …

Publication series

NameIEEE International Workshop on Signal Processing Systems
ISSN (Electronic)2374-7390

Conference

ConferenceIEEE International Workshop on Signal Processing Systems
Period1/01/00 → …

Abstract

The current trend in high performance and embedded signal processing consists of designing increasingly complex heterogeneous hardware architectures with non-uniform communication resources. In order to take hardware and software design decisions, early evaluations of the system non-functional properties are needed. These evaluations of system efficiency require high-level information on both the algorithms and the architecture. In this paper, we define the notion of Model of Architecture (MoA) and study the combination of a Model of Computation (MoC) and an MoA to provide a design space exploration environment for the study of the algorithmic and architectural choices. A cost is computed from the mapping of an application, represented by a model conforming a MoC onto an architecture represented by a model conforming an MoA. The cost is composed of a processing-related part and a communicationrelated part. It is an abstract scalar value to be minimized and can represent any non-functional requirement of a system such as memory, energy, throughput or latency.