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Multilevel outphasing power amplifier system with a transmission-line power combiner

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Details

Original languageEnglish
Title of host publicationConference on Ph.D. Research in Microelectronics and Electronics (PRIME 2016)
PublisherIEEE
Number of pages4
ISBN (Electronic)978-1-5090-0493-5
DOIs
Publication statusPublished - Jun 2016
Publication typeA4 Article in a conference publication
EventConference on Ph. D. Research in Microelectronics and Electronics -
Duration: 1 Jan 1900 → …

Conference

ConferenceConference on Ph. D. Research in Microelectronics and Electronics
Period1/01/00 → …

Abstract

This paper presents a multilevel outphasing power amplifier (PA) system consisting of eight class-D unit PAs on 28 nm CMOS and an off-chip transmission-line power combiner. The combiner, implemented on PCB with microstrip lines, was designed to operate at 1.8 GHz frequency and filter out the third and fifth harmonics generated by the PAs. The combiner layout was designed so that the line spacing increases towards the output to reduce coupling, while the lines are equal in length. The simulated maximum output power is 32.3 dBm (1.71 W) with an efficiency of 34.4%. With 20 MHz and 100 MHz LTE signals, average efficiencies of 15.2% and 15.1% were achieved, respectively.

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