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Operation set customization in retargetable compilers

Research output: Scientific - peer-reviewConference contribution

Details

Original languageEnglish
Title of host publicationSignals, Systems and Computers ASILOMAR, 2011 Conference Record of the Forty Fifth Asilomar Conference, 6-9 November 2011, Pacific Grove, CA, United States
PublisherIEEE Computer Society
Pages761-765
ISBN (Print)978-1-4673-0321-7
DOIs
StatePublished - 2011
Publication typeA4 Article in a conference publication
EventAsilomar Conference on Signals, Systems and Computers -

Publication series

NameAsilomar Conference on Signals, Systems and Computers
PublisherIEEE Computer Society
ISSN (Print)1058-6393

Conference

ConferenceAsilomar Conference on Signals, Systems and Computers
Period1/01/00 → …

Abstract

The core tool in Application-Specific Instruction Set Processor (ASIP) design toolsets is a retargetable compiler, which can generate efficient code to any processor developed with the toolset. Such a compiler must automatically adapt itself to the operation set supported by the designed processor by emulating missing instructions with other instructions and by selecting custom instructions automatically whenever possible. This paper proposes a simplified Directed Acyclic Graph-based recursive mechanism to support operation set customization. The proposed mechanism is capable of generating instruction selectors and architecture simulation models automatically, thus is suitable for fast design space exploration of ASIP operation sets.

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