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Performance comparison of selected wired and wireless networks on chip architectures

Research output: Chapter in Book/Report/Conference proceedingConference contributionScientificpeer-review

Details

Original languageEnglish
Title of host publication2015 17TH Conference of Open Innovations Association (FRUCT)
Pages68-74
Number of pages7
DOIs
Publication statusPublished - 3 Jun 2015
Publication typeA4 Article in a conference publication
EventConference of the Open Innovations Association FRUCT -
Duration: 1 Jan 1900 → …

Publication series

NameConference of Open Innovations Association (FRUCT)
ISSN (Print)2305-7254

Conference

ConferenceConference of the Open Innovations Association FRUCT
Period1/01/00 → …

Abstract

In this paper we compare performance intra-core communications in network on chips.We consider two alternative architectures, wired and wireless. The wired on is based on a common bus (ring) with all the cores attached to it. We compare it to the mesh (point-to-point) architecture based on THz wireless links operating in 0.1-0.54 frequency band. Using reference latencies of inter-core communications in modern CPUs we perform an applicability assessment of considered schemes. As performance metrics of interest we consider both delay and capacity. Our results indicate that the latter architecture outperforms the former by a singificant margin. The proposed system can be realized implementing directional antennas at all cores and ensuring that cores are placed on a chip such that there is no interference between them.