Programmable and Scalable Architecture for Graphics Processing Units
Research output: Chapter in Book/Report/Conference proceeding › Chapter › Scientific › peer-review
|Title of host publication||Transactions on High-Performance Embedded Architectures and Compilers V|
|Editors||Per Stenström, Cristina Silvano, Koen Bertels, Mike Schulte|
|Publication status||Published - 23 Feb 2019|
|Publication type||A3 Part of a book or another research book|
|Name||Lecture Notes in Computer Science|
In this paper we evaluate the suitability of Transport Triggered Architectures (TTA) as a basis for implementing GPUs. TTA improves scalability over the traditional VLIW-style architectures making it interesting for computationally intensive applications. We show that TTA provides high floating point processing performance while allows more programming freedom than vector processors.
Finally, one of the main features of the presented TTA-based GPU design is its fully programmable architecture making it a suitable target for general purpose computing on GPU APIs which have become popular in the recent years.