Simplified Floating-Point Division and Square Root
Research output: Scientific - peer-review › Conference contribution
Details
| Original language | English |
|---|---|
| Title of host publication | IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2013, Vancouver, Canada, May 26-31, 2013 |
| Place of Publication | Piscataway, NJ |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 2707-2711 |
| Number of pages | 5 |
| ISBN (Print) | 978-1-4799-0356-6 |
| State | Published - 2013 |
| Publication type | A4 Article in a conference publication |
| Event | IEEE International Conference on Acoustics, Speech and Signal Processing - |
Publication series
| Name | IEEE International Conference on Acoustics, Speech, and Signal Processing |
|---|---|
| ISSN (Print) | 1520-6149 |
Conference
| Conference | IEEE International Conference on Acoustics, Speech and Signal Processing |
|---|---|
| Period | 1/01/00 → 1/01/00 |
Abstract
Digital Signal Processing (DSP) algorithms on low-power embedded platforms are often implemented using fixed-point arithmetic due to expected power and area savings over floating-point computation. However, recent research shows that floating-point arithmetic can be made competitive by using a reduced-precision format instead of, e.g., IEEE standard single precision, thereby avoiding the algorithm design and implementation difficulties associated with fixed-point arithmetic. This paper investigates the effects of simplified floating-point arithmetic applied to an FMA-based floating-point unit and the associated software division and square root operations. Software operations are proposed which attain near-exact precision with twice the performance of exact algorithms and resolve overflow-related errors with inexpensive exponent-manipulation special instructions.
Publication forum classification
Field of science, Statistics Finland
Field of science, Academy of Finland
TUT Thematic Areas
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