256-State Rate 1/2 Viterbi Decoder on TTA Processor

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Standard

256-State Rate 1/2 Viterbi Decoder on TTA Processor. / Salmela, P.; Järvinen, T.; Sipilä, T.; Takala, J.

Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece. toim. / S. Vassiliadis. 2005. s. 370-375.

Tutkimustuotos › › vertaisarvioitu

Harvard

Salmela, P, Järvinen, T, Sipilä, T & Takala, J 2005, 256-State Rate 1/2 Viterbi Decoder on TTA Processor. julkaisussa S Vassiliadis (Toimittaja), Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece. Sivut 370-375.

APA

Salmela, P., Järvinen, T., Sipilä, T., & Takala, J. (2005). 256-State Rate 1/2 Viterbi Decoder on TTA Processor. teoksessa S. Vassiliadis (Toimittaja), Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece (Sivut 370-375)

Vancouver

Salmela P, Järvinen T, Sipilä T, Takala J. 256-State Rate 1/2 Viterbi Decoder on TTA Processor. julkaisussa Vassiliadis S, toimittaja, Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece. 2005. s. 370-375

Author

Salmela, P. ; Järvinen, T. ; Sipilä, T. ; Takala, J. / 256-State Rate 1/2 Viterbi Decoder on TTA Processor. Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece. Toimittaja / S. Vassiliadis. 2005. Sivut 370-375

Bibtex - Lataa

@inproceedings{87fb8176876a4356ac3fde534f7740fa,

title = "256-State Rate 1/2 Viterbi Decoder on TTA Processor",

author = "P. Salmela and T. J{\"a}rvinen and T. Sipil{\"a} and J. Takala",

note = "ISBN 0-7695-2407-9, ISSN 1063-6862<br/>Contribution: organisation=tkt,FACT1=1",

year = "2005",

language = "English",

pages = "370--375",

editor = "S. Vassiliadis",

booktitle = "Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece",

}

RIS (suitable for import to EndNote) - Lataa

TY - GEN

T1 - 256-State Rate 1/2 Viterbi Decoder on TTA Processor

AU - Salmela, P.

AU - Järvinen, T.

AU - Sipilä, T.

AU - Takala, J.

N1 - ISBN 0-7695-2407-9, ISSN 1063-6862<br/>Contribution: organisation=tkt,FACT1=1

PY - 2005

Y1 - 2005

M3 - Conference contribution

SP - 370

EP - 375

BT - Proceedings 2005 of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, 23-25 July 2005, Samos Greece

A2 - Vassiliadis, S.

ER -

TUTCRIS