TUTCRIS - Tampereen teknillinen yliopisto

TUTCRIS

A RTL asynchronous FIFO design using modified micropipeline

Tutkimustuotosvertaisarvioitu

Yksityiskohdat

AlkuperäiskieliEnglanti
OtsikkoBEC 2006 - 2006 International Baltic Electronics Conference; Proceedings of the 10th Biennial Baltic Electronics Conference
Sivut95-98
Sivumäärä4
DOI - pysyväislinkit
TilaJulkaistu - 2006
OKM-julkaisutyyppiA4 Artikkeli konferenssijulkaisussa
TapahtumaBEC 2006 - 2006 International Baltic Electronics Conference; 10th Biennial Batic Electronics Conference - Tallinn, Viro
Kesto: 2 lokakuuta 20064 lokakuuta 2006

Conference

ConferenceBEC 2006 - 2006 International Baltic Electronics Conference; 10th Biennial Batic Electronics Conference
MaaViro
KaupunkiTallinn
Ajanjakso2/10/064/10/06

Tiivistelmä

An asynchronous FIFO which applies fourphase handshake protocol to read or write data has been designed in Register-Transfer Level (RTL) using VHDL. The asynchronous FIFO in this paper avoids data movement in a flow-through FIFO by applying token passing scheme in its control pipelines and multiplexer in its data register bank. Two control pipelines which base on micropipeline structure are proposed and used as the control logic for the asynchronous FIFO. An asynchronous arbiter and C-element RTL structures used in the proposed asynchronous FIFO are also presented.

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