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Multi Bounding Volume Hierarchies for Ray Tracing Pipelines

Tutkimustuotosvertaisarvioitu

Standard

Multi Bounding Volume Hierarchies for Ray Tracing Pipelines. / Viitanen, Timo; Koskela, Matias; Jääskeläinen, Pekka; Takala, Jarmo.

SIGGRAPH ASIA 2016 Technical Briefs. ACM, 2016. 8.

Tutkimustuotosvertaisarvioitu

Harvard

Viitanen, T, Koskela, M, Jääskeläinen, P & Takala, J 2016, Multi Bounding Volume Hierarchies for Ray Tracing Pipelines. julkaisussa SIGGRAPH ASIA 2016 Technical Briefs., 8, ACM, ACM SIGGRAPH ASIA, 1/01/00. https://doi.org/10.1145/3005358.3005384

APA

Viitanen, T., Koskela, M., Jääskeläinen, P., & Takala, J. (2016). Multi Bounding Volume Hierarchies for Ray Tracing Pipelines. teoksessa SIGGRAPH ASIA 2016 Technical Briefs [8] ACM. https://doi.org/10.1145/3005358.3005384

Vancouver

Viitanen T, Koskela M, Jääskeläinen P, Takala J. Multi Bounding Volume Hierarchies for Ray Tracing Pipelines. julkaisussa SIGGRAPH ASIA 2016 Technical Briefs. ACM. 2016. 8 https://doi.org/10.1145/3005358.3005384

Author

Viitanen, Timo ; Koskela, Matias ; Jääskeläinen, Pekka ; Takala, Jarmo. / Multi Bounding Volume Hierarchies for Ray Tracing Pipelines. SIGGRAPH ASIA 2016 Technical Briefs. ACM, 2016.

Bibtex - Lataa

@inproceedings{1184ca4ae5d14b3d8125a616d477541a,
title = "Multi Bounding Volume Hierarchies for Ray Tracing Pipelines",
abstract = "High-performance ray tracing on CPU is now largely based on Multi Bounding Volume Hierarchy (MBVH) trees. We apply MBVH to a fixed-function ray tracing accelerator architecture. According to cycle-level simulations and power analysis, MBVH reduces energy per frame by an average of 24{\%} and improves performance per area by 19{\%} in scenes with incoherent rays, due to its compact memory layout which reduces DRAM traffic. With primary rays, energy efficiency improves by 15{\%} and performance per area by 20{\%}.",
keywords = "ray tracing, ray tracing hardware",
author = "Timo Viitanen and Matias Koskela and Pekka J{\"a}{\"a}skel{\"a}inen and Jarmo Takala",
year = "2016",
doi = "10.1145/3005358.3005384",
language = "English",
isbn = "978-1-4503-4541-5",
booktitle = "SIGGRAPH ASIA 2016 Technical Briefs",
publisher = "ACM",

}

RIS (suitable for import to EndNote) - Lataa

TY - GEN

T1 - Multi Bounding Volume Hierarchies for Ray Tracing Pipelines

AU - Viitanen, Timo

AU - Koskela, Matias

AU - Jääskeläinen, Pekka

AU - Takala, Jarmo

PY - 2016

Y1 - 2016

N2 - High-performance ray tracing on CPU is now largely based on Multi Bounding Volume Hierarchy (MBVH) trees. We apply MBVH to a fixed-function ray tracing accelerator architecture. According to cycle-level simulations and power analysis, MBVH reduces energy per frame by an average of 24% and improves performance per area by 19% in scenes with incoherent rays, due to its compact memory layout which reduces DRAM traffic. With primary rays, energy efficiency improves by 15% and performance per area by 20%.

AB - High-performance ray tracing on CPU is now largely based on Multi Bounding Volume Hierarchy (MBVH) trees. We apply MBVH to a fixed-function ray tracing accelerator architecture. According to cycle-level simulations and power analysis, MBVH reduces energy per frame by an average of 24% and improves performance per area by 19% in scenes with incoherent rays, due to its compact memory layout which reduces DRAM traffic. With primary rays, energy efficiency improves by 15% and performance per area by 20%.

KW - ray tracing, ray tracing hardware

U2 - 10.1145/3005358.3005384

DO - 10.1145/3005358.3005384

M3 - Conference contribution

SN - 978-1-4503-4541-5

BT - SIGGRAPH ASIA 2016 Technical Briefs

PB - ACM

ER -