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Parallel memory implementation for arbitrary stride accesses

Tutkimustuotosvertaisarvioitu

Standard

Parallel memory implementation for arbitrary stride accesses. / Aho, E.; Vanne, J.; Hämäläinen, T. D.

Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece. 2006. s. 1-6.

Tutkimustuotosvertaisarvioitu

Harvard

Aho, E, Vanne, J & Hämäläinen, TD 2006, Parallel memory implementation for arbitrary stride accesses. julkaisussa Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece. Sivut 1-6.

APA

Aho, E., Vanne, J., & Hämäläinen, T. D. (2006). Parallel memory implementation for arbitrary stride accesses. teoksessa Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece (Sivut 1-6)

Vancouver

Aho E, Vanne J, Hämäläinen TD. Parallel memory implementation for arbitrary stride accesses. julkaisussa Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece. 2006. s. 1-6

Author

Aho, E. ; Vanne, J. ; Hämäläinen, T. D. / Parallel memory implementation for arbitrary stride accesses. Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece. 2006. Sivut 1-6

Bibtex - Lataa

@inproceedings{b2478926763641c7925b437e42927e8d,
title = "Parallel memory implementation for arbitrary stride accesses",
author = "E. Aho and J. Vanne and H{\"a}m{\"a}l{\"a}inen, {T. D.}",
note = "ISBN: 1-4244-0155-0<br/>Contribution: organisation=tkt,FACT1=1",
year = "2006",
language = "English",
isbn = "1-4244-0155-0",
pages = "1--6",
booktitle = "Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece",

}

RIS (suitable for import to EndNote) - Lataa

TY - GEN

T1 - Parallel memory implementation for arbitrary stride accesses

AU - Aho, E.

AU - Vanne, J.

AU - Hämäläinen, T. D.

N1 - ISBN: 1-4244-0155-0<br/>Contribution: organisation=tkt,FACT1=1

PY - 2006

Y1 - 2006

M3 - Conference contribution

SN - 1-4244-0155-0

SP - 1

EP - 6

BT - Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 17-20 July, 2006, Samos, Greece

ER -