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Performance comparison of selected wired and wireless networks on chip architectures

Tutkimustuotosvertaisarvioitu

Standard

Performance comparison of selected wired and wireless networks on chip architectures. / Komar, Maria.

2015 17TH Conference of Open Innovations Association (FRUCT). 2015. s. 68-74 (Conference of Open Innovations Association (FRUCT)).

Tutkimustuotosvertaisarvioitu

Harvard

Komar, M 2015, Performance comparison of selected wired and wireless networks on chip architectures. julkaisussa 2015 17TH Conference of Open Innovations Association (FRUCT). Conference of Open Innovations Association (FRUCT), Sivut 68-74, Conference of the Open Innovations Association FRUCT, 1/01/00. https://doi.org/10.1109/FRUCT.2015.7117974

APA

Komar, M. (2015). Performance comparison of selected wired and wireless networks on chip architectures. teoksessa 2015 17TH Conference of Open Innovations Association (FRUCT) (Sivut 68-74). (Conference of Open Innovations Association (FRUCT)). https://doi.org/10.1109/FRUCT.2015.7117974

Vancouver

Komar M. Performance comparison of selected wired and wireless networks on chip architectures. julkaisussa 2015 17TH Conference of Open Innovations Association (FRUCT). 2015. s. 68-74. (Conference of Open Innovations Association (FRUCT)). https://doi.org/10.1109/FRUCT.2015.7117974

Author

Komar, Maria. / Performance comparison of selected wired and wireless networks on chip architectures. 2015 17TH Conference of Open Innovations Association (FRUCT). 2015. Sivut 68-74 (Conference of Open Innovations Association (FRUCT)).

Bibtex - Lataa

@inproceedings{beca1391630349d380574793fba53b65,
title = "Performance comparison of selected wired and wireless networks on chip architectures",
abstract = "In this paper we compare performance intra-core communications in network on chips.We consider two alternative architectures, wired and wireless. The wired on is based on a common bus (ring) with all the cores attached to it. We compare it to the mesh (point-to-point) architecture based on THz wireless links operating in 0.1-0.54 frequency band. Using reference latencies of inter-core communications in modern CPUs we perform an applicability assessment of considered schemes. As performance metrics of interest we consider both delay and capacity. Our results indicate that the latter architecture outperforms the former by a singificant margin. The proposed system can be realized implementing directional antennas at all cores and ensuring that cores are placed on a chip such that there is no interference between them.",
author = "Maria Komar",
note = "INT=elt,{"}Komar, Maria{"}",
year = "2015",
month = "6",
day = "3",
doi = "10.1109/FRUCT.2015.7117974",
language = "English",
series = "Conference of Open Innovations Association (FRUCT)",
pages = "68--74",
booktitle = "2015 17TH Conference of Open Innovations Association (FRUCT)",

}

RIS (suitable for import to EndNote) - Lataa

TY - GEN

T1 - Performance comparison of selected wired and wireless networks on chip architectures

AU - Komar, Maria

N1 - INT=elt,"Komar, Maria"

PY - 2015/6/3

Y1 - 2015/6/3

N2 - In this paper we compare performance intra-core communications in network on chips.We consider two alternative architectures, wired and wireless. The wired on is based on a common bus (ring) with all the cores attached to it. We compare it to the mesh (point-to-point) architecture based on THz wireless links operating in 0.1-0.54 frequency band. Using reference latencies of inter-core communications in modern CPUs we perform an applicability assessment of considered schemes. As performance metrics of interest we consider both delay and capacity. Our results indicate that the latter architecture outperforms the former by a singificant margin. The proposed system can be realized implementing directional antennas at all cores and ensuring that cores are placed on a chip such that there is no interference between them.

AB - In this paper we compare performance intra-core communications in network on chips.We consider two alternative architectures, wired and wireless. The wired on is based on a common bus (ring) with all the cores attached to it. We compare it to the mesh (point-to-point) architecture based on THz wireless links operating in 0.1-0.54 frequency band. Using reference latencies of inter-core communications in modern CPUs we perform an applicability assessment of considered schemes. As performance metrics of interest we consider both delay and capacity. Our results indicate that the latter architecture outperforms the former by a singificant margin. The proposed system can be realized implementing directional antennas at all cores and ensuring that cores are placed on a chip such that there is no interference between them.

U2 - 10.1109/FRUCT.2015.7117974

DO - 10.1109/FRUCT.2015.7117974

M3 - Conference contribution

T3 - Conference of Open Innovations Association (FRUCT)

SP - 68

EP - 74

BT - 2015 17TH Conference of Open Innovations Association (FRUCT)

ER -